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LT1336 Half-Bridge N-Channel Power MOSFET Driver with Boost Regulator
FEATURES
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DESCRIPTION
The LT (R)1336 is a cost effective half-bridge N-channel power MOSFET driver. The floating driver can drive the topside N-channel power MOSFETs operating off a high voltage (HV) rail of up to 60V (absolute maximum). In PWM operation an on-chip switching regulator maintains charge in the bootstrap capacitor even when approaching and operating at 100% duty cycle. The internal logic prevents the inputs from turning on the power MOSFETs in a half-bridge at the same time. Its unique adaptive protection against shoot-through currents eliminates all matching requirements for the two MOSFETs. This greatly eases the design of high efficiency motor control and switching regulator systems. During low supply or start-up conditions, the undervoltage lockout actively pulls the driver outputs low to prevent the power MOSFETs from being partially turned on. The 0.5V hysteresis allows reliable operation even with slowly varying supplies.
, LTC and LT are registered trademarks of Linear Technology Corporation.
s s
s s s s s
Floating Top Driver Switches Up to 60V Internal Boost Regulator for DC Operation Drives Gate of Top N-Channel MOSFET above Supply 180ns Transition Times Driving 10,000pF Adaptive Nonoverlapping Gate Drives Prevent Shoot-Through Top Drive Maintained at High Duty Cycles TTL/CMOS Input Levels Undervoltage Lockout with Hysteresis Operates at Supply Voltages from 10V to 15V Separate Top and Bottom Drive Pins
APPLICATIONS
s s s s s s
PWM of High Current Inductive Loads Half-Bridge and Full-Bridge Motor Control Synchronous Step-Down Switching Regulators 3-Phase Brushless Motor Drive High Current Transducer Drivers Class D Power Amplifiers
TYPICAL APPLICATION
12V 1N4148 200H* RSENSE 2 1/4W 1 ISENSE 2 SV + PV + SWITCH BOOST 16 14 1N4148 HV = 40V MAX**
+
10 10F 25V 5 3 4 PWM 0Hz TO 100kHz
13 TGATEDR LT1336 12 TGATEFB 11 TSOURCE UVOUT 9 BGATEDR INTOP 8 BGATEFB INBOTTOM SGND 6 SWGND 15 PGND 7
+
IRFZ44
1000F 100V
+
CBOOST 1F
INTOP INBOTTOM TGATEDR
IRFZ44
L L H H
*SUMIDA RCR-664D-221KC **FOR HV > 40V SEE "DERIVING THE FLOATING SUPPLY WITH THE FLYBACK TOPOLOGY" IN APPLICATIONS INFORMATION SECTION
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BGATEDR L H L L
L H L H
L L H L
1336 TA01
1
LT1336
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (Pins 2, 10) .................................... 20V Boost Voltage ......................................................... 75V Peak Output Currents (< 10s) .............................. 1.5A Input Pin Voltages .......................... - 0.3V to V + + 0.3V Top Source Voltage ..................................... - 5V to 60V Boost-to-Source Voltage (VBOOST - VTSOURCE) ............................ - 0.3V to 20V Switch Voltage (Pin 16) ............................ - 0.3V to 60V Operating Temperature Range Commercial ............................................ 0C to 70C Industrial ........................................... - 40C to 85C Junction Temperature (Note 1)............................ 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
PACKAGE/ORDER INFORMATION
TOP VIEW ISENSE SV + INTOP INBOTTOM UVOUT SGND PGND BGATEFB 1 2 3 4 5 6 7 8 16 SWITCH 15 SWGND 14 BOOST 13 TGATEDR 12 TGATEFB 11 TSOURCE 10 PV + 9 BGATEDR
ORDER PART NUMBER LT1336CN LT1336CS LT1336IN LT1336IS
N PACKAGE 16-LEAD PDIP
S PACKAGE 16-LEAD PLASTIC SO NARROW
TJMAX = 125C, JA = 70C/ W (N) TJMAX = 125C, JA = 110C/ W (S)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS Test Circuit, TA = 25C, V + = VBOOST = 12V, VTSOURCE = 0V and Pins 1, 16
open. Gate Feedback pins connected to Gate Drive pins unless otherwise specified.
SYMBOL PARAMETER DC Supply Current (Note 2) IS CONDITIONS V + = 15V, VINTOP = 0.8V, VINBOTTOM = 2V V + = 15V, VINTOP = 2V, VINBOTTOM = 0.8V V + = 15V, VINTOP = 0.8V, VINBOTTOM = 0.8V V + = 15V, VTSOURCE = 40V, VINTOP = VINBOTTOM = 0.8V (Note 3) V + = 15V, VTSOURCE = 60V, VBOOST = 75V, VINTOP = VINBOTTOM = 0.8V
q q
MIN 12 12 12
TYP 15 14 15 30 5 1.4
MAX 20 20 20 40 7 0.8 25 9.4 8.8 9.8 9.2 5 0.4 12 12 0.7 0.7
UNITS mA mA mA mA mA V V A V V V V A V V V V V
IBOOST VIL VIH IIN V +UVH V +UVL VBUVH VBUVL IUVOUT VUVOUT VOH
Boost Current (Note 2) Input Logic Low Input Logic High Input Current V + Undervoltage Start-Up Threshold V + Undervoltage Shutdown Threshold VBOOST Undervoltage Start-Up Threshold VBOOST Undervoltage Shutdown Threshold Undervoltage Output Leakage Undervoltage Output Saturation Top Gate ON Voltage Bottom Gate ON Voltage
3
2 8.4 7.8
1.7 7 8.9 8.3 9.3 8.7 0.1 0.2
VINTOP = VINBOTTOM = 4V
q
VTSOURCE = 60V, VBOOST - VTSOURCE VTSOURCE = 60V, VBOOST - VTSOURCE V + = 15V V + = 7.5V, IUVOUT = 2.5mA VINTOP = 2V, VINBOTTOM = 0.8V, VTGATE DR - VTSOURCE VINTOP = 0.8V, VINBOTTOM = 2V, VBGATE DR VINTOP = 0.8V, VINBOTTOM = 2V, VTGATE DR - VTSOURCE VINTOP = 2V, VINBOTTOM = 0.8V, VBGATE DR
q q q q q q
8.8 8.2
11 11
11.3 11.3 0.4 0.4
VOL
Top Gate OFF Voltage Bottom Gate OFF Voltage
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LT1336
ELECTRICAL CHARACTERISTICS Test Circuit, TA = 25C, V + = VBOOST = 12V, VTSOURCE = 0V, and Pins 1, 16
open. Gate Feedback pins connected to Gate Drive pins unless otherwise specified.
SYMBOL PARAMETER VIS VISHYS VSAT VBOUT tr ISENSE Peak Current Threshold ISENSE Hysteresis Switch Saturation Voltage VBOOST Regulated Output Top Gate Rise Time Bottom Gate Rise Time tf Top Gate Fall Time Bottom Gate Fall Time t D1 Top Gate Turn-On Delay Bottom Gate Turn-On Delay t D2 Top Gate Turn-Off Delay Bottom Gate Turn-Off Delay t D3 Top Gate Lockout Delay Bottom Gate Lockout Delay t D4 Top Gate Release Delay Bottom Gate Release Delay CONDITIONS VTSOURCE = 60V, VBOOST = 68V, V + - VISENSE VTSOURCE = 60V, VBOOST = 68V VISENSE = V +, VBOOST - VTSOURCE = 9V, ISW = 100mA VTSOURCE = 40V, VINTOP = VINBOTTOM = 0.8V, IBOOST = 10mA, VBOOST - VTSOURCE VINTOP (+) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 4) VINBOTTOM (+) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 4) VINTOP (-) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 4) VINBOTTOM (-) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 4) VINTOP (+) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 4) VINBOTTOM (+) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 4) VINTOP (-) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 4) VINBOTTOM (-) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 4) VINBOTTOM (+) Transition, VINTOP = 2V, Measured at VTGATE DR - VTSOURCE (Note 4) VINTOP (+) Transition, VINBOTTOM = 2V, Measured at VBGATE DR (Note 4) VINBOTTOM (-) Transition, VINTOP = 2V, Measured at VTGATE DR - VTSOURCE (Note 4) VINTOP (-) Transition, VINBOTTOM = 2V, Measured at VBGATE DR (Note 4)
q q q q q q q q q q q q q
MIN 310 25
TYP 480 55 0.85
MAX 650 85 1.2 11.2 200 200 140 140 500 400 600 400 600 500 500 400
UNITS mV mV V V ns ns ns ns ns ns ns ns ns ns ns ns
10
10.6 130 90 60 60 250 200 300 200 300 250 250 200
The q denotes specifications which apply over the full operating temperature range. Note 1: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LT1336CN/LT1336IN: TJ = TA + (PD)(70C/ W) LT1336CS/LT1336IS: TJ = TA + (PD)(110C/ W) Note 2: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Typical Performance Characteristics and Applications Information sections.
Note 3: Pins 1 and 16 connected to each end of the inductor. Booster is free running. Note 4: See Timing Diagram. Gate rise times are measured from 2V to 10V and fall times are measured from 10V to 2V. Delay times are measured from the input transition to when the gate voltage has risen to 2V or decreased to 10V.
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LT1336 TYPICAL PERFORMANCE CHARACTERISTICS
DC Supply Current vs Supply Voltage
22 20 VTSOURCE = 0V BOTH INPUTS HIGH OR LOW 18 17
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
16 14 12 10 8 6 4 6 8 10 12 14 16 SUPPLY VOLTAGE (V) 18 20 VINTOP = HIGH VINBOTTOM = LOW VINTOP = LOW VINBOTTOM = HIGH
15 14 13 12 11 10 9 -50 -25
BOTH INPUTS HIGH OR LOW
SUPPLY CURRENT (mA)
18
DC + Dynamic Supply Current vs Input Frequency
60 50 50% DUTY CYCLE CGATE = 3000pF 60 50
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
40 30 V + = 15V 20 10 0
40 CGATE = 10000pF 30 CGATE = 3000pF 20 10 0 CGATE = 1000pF
SUPPLY VOLTAGE (V)
V + = 20V
1
10 100 INPUT FREQUENCY (kHz)
Undervoltage Lockout (VBOOST)
13 12
VBOOST - VTSOURCE VOLTAGE (V)
VTSOURCE = 60V
INPUT THRESHOLD VOLTAGE (V)
1.8 1.6
11 10 9 8 7 6 5 4 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 SHUTDOWN THRESHOLD START-UP THRESHOLD
INPUT CURRENT (A)
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UW
1336 G01
DC Supply Current vs Temperature
V + = 12V VTSOURCE = 0V 34 31 28 25 22 19 16 13 10 0 25 50 75 TEMPERATURE (C) 100 125
DC Supply Current vs Top Source Voltage
V += 12V VINTOP = LOW VINBOTTOM = HIGH BOTH INPUTS HIGH OR LOW
16
VINTOP = HIGH VINBOTTOM = LOW VINTOP = LOW VINBOTTOM = HIGH
VINTOP = HIGH VINBOTTOM = LOW
0
5
10 15 20 25 30 TOP SOURCE VOLTAGE (V)
35
40
1336 G02
1336 G18
DC + Dynamic Supply Current vs Input Frequency
13
Undervoltage Lockout (V +)
12 11 10 START-UP THRESHOLD 9 8 7 6 5 SHUTDOWN THRESHOLD
50% DUTY CYCLE V+ = 12V
V + = 10V
1000
1336 G03
1
10 100 INPUT FREQUENCY (kHz)
1000
1336 G04
4 -50
-25
0 25 50 75 TEMPERATURE (C)
100
125
1336 G05
Input Threshold Voltage vs Temperature
2.0 V + = 12V VHIGH 14 13 12 11 10 9 8 7 6 5 0.8 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125
Top or Bottom Input Pin Current vs Temperature
V + = 12V VIN = 4V
VLOW 1.4 1.2 1.0
4 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
1336 G06
1336 G07
1336 G08
LT1336 TYPICAL PERFORMANCE CHARACTERISTICS
Top or Bottom Input Pin Current vs Input Voltage
5.0 4.5 4.0 V + = 12V 230 210 V + = 12V
BOTTOM GATE RISE TIME (ns)
BOTTOM GATE FALL TIME (ns)
INPUT CURRENT (mA)
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 4 5 6 10 8 7 9 INPUT VOLTAGE (V) 11 12
Top Gate Rise Time vs Temperature
300 280 260 V + = 12V CLOAD = 10000pF
TOP GATE FALL TIME (ns)
TOP GATE RISE TIME (ns)
240 220 200 180 160 140 120 100 80 -50 -25 CLOAD = 1000pF 0 25 50 75 TEMPERATURE (C) 100 125 CLOAD = 3000pF
140 120 100 80 60 40 CLOAD = 1000pF 20 -50 -25 0 25 50 75 100 125 CLOAD = 3000pF
TURN-ON DELAY TIME (ns)
Turn-Off Delay Time vs Temperature
400 350
TURN-OFF DELAY TIME (ns)
V + = 12V CLOAD = 3000pF
LOCKOUT DELAY TIME (ns)
RELEASE DELAY TIME (ns)
300 250 200 150 100 -50
TOP DRIVER
BOTTOM DRIVER
-25
0 25 50 75 TEMPERATURE (C)
UW
1336 G09 1336 G12
Bottom Gate Rise Time vs Temperature
210 190 170 150 130 110 90 70 50 125
Bottom Gate Fall Time vs Temperature
V + = 12V
190 170 150 130 110 90 70 50 -50
CLOAD = 10000pF
CLOAD = 10000pF
CLOAD = 3000pF CLOAD = 1000pF -25 0 25 50 75 TEMPERATURE (C) 100
CLOAD = 1000pF
CLOAD = 3000pF
30 -50
-25
0 25 50 75 TEMPERATURE (C)
100
125
1336 G10
1336 G11
Top Gate Fall Time vs Temperature
180 160 V + = 12V CLOAD = 10000pF
Turn-On Delay Time vs Temperature
400 350 300 TOP DRIVER 250 200 BOTTOM DRIVER 150 100 -50 V + = 12V CLOAD = 3000pF
-25
TEMPERATURE (C)
1336 G13
0 25 50 75 TEMPERATURE (C)
100
125
1336 G14
Lockout Delay Time vs Temperature
400 350 300 250 200 150 100 -50 V + = 12V CLOAD = 3000pF
Release Delay Time vs Temperature
400 350 V + = 12V CLOAD = 3000pF
TOP DRIVER BOTTOM DRIVER
300 TOP DRIVER 250 200 BOTTOM DRIVER 150 100 -50
100
125
-25
0 25 50 75 TEMPERATURE (C)
100
125
-25
0 25 50 75 TEMPERATURE (C)
100
125
1336 G15
1336 G16
1336 G17
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LT1336 TYPICAL PERFORMANCE CHARACTERISTICS
VBOOST Regulated Output vs Temperature
12.0
ISENSE VOLTAGE THRESHOLD (mV) VBOOST REGULATED OUTPUT (V)
11.5 11.0 10.5 10.0 9.5 9.0 8.5 8.0 -50 -25 0 25 50 V + = 12V VTSOURCE = 40V ILOAD = 10mA 75 100 125 VBOOST - VTSOURCE
PIN FUNCTIONS
ISENSE (Pin 1): Boost Regulator ISENSE Comparator Input. An RSENSE placed between Pin 1 and V + sets the maximum peak current. Pin 1 can be left open if the boost regulator is not used. SV+ (Pin 2): Main Signal Supply. Must be closely decoupled to the signal ground Pin 6. INTOP (Pin 3): Top Driver Input. Pin 3 is disabled when Pin 4 is high. A 3k input resistor followed by a 5V internal clamp prevents saturation of the input transistors. INBOTTOM (Pin 4): Bottom Driver Input. Pin 4 is disabled when Pin 3 is high. A 3k input resistor followed by a 5V internal clamp prevents saturation of the input transistors. UVOUT (Pin 5): Undervoltage Output. Open collector NPN output which turns on when V + drops below the undervoltage threshold. SGND (Pin 6): Small-Signal Ground. Must be routed separately from other grounds to the system ground. PGND (Pin 7): Bottom Driver Power Ground. Connects to source of bottom N-channel MOSFET. BGATEFB (Pin 8): Bottom Gate Feedback. Must connect directly to the bottom power MOSFET gate. The top MOSFET turn-on is inhibited until Pin 8 has discharged to below 2.5V. BGATEDR (Pin 9): Bottom Gate Drive. The high current drive point for the bottom MOSFET. When a gate resistor is used it is inserted between Pin 9 and the gate of the MOSFET. PV + (Pin 10): Bottom Driver Supply. Must be connected to the same supply as Pin 2. TSOURCE (Pin 11): Top Driver Return. Connects to the top MOSFET source and the low side of the bootstrap capacitor. TGATEFB (Pin 12): Top Gate Feedback. Must connect directly to the top power MOSFET gate. The bottom MOSFET turn-on is inhibited until VTGATE FB - VTSOURCE has discharged to below 2.9V. TGATEDR (Pin 13): Top Gate Drive. The high current drive point for the top MOSFET. When a gate resistor is used it is inserted between Pin 13 and the gate of the MOSFET. BOOST (Pin 14): Top Driver Supply. Connects to the high side of the bootstrap capacitor. SWGND (Pin 15): Boost Regulator Ground. Must be routed separately from the other grounds to the system ground. Pin 15 can be left open if the boost regulator is not used. SWITCH (Pin 16): Boost Regulator Switch. Connect this pin to the inductor/diode of the boost regulator network. Pin 16 can be left open if the boost regulator is not used.
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ISENSE Voltage Threshold vs Temperature
0.52 0.50 0.48 0.46 0.44 0.42 0.40 0.38 0.36 -50 -25 0 25 50 V + = 12V VBOOST = 68V VTSOURCE = 60V 75 100 125 LOW VOLTAGE THRESHOLD HIGH VOLTAGE THRESHOLD
TEMPERATURE (C)
1336 G19
TEMPERATURE (C)
1336 G20
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LT1336
FUNCTIONAL DIAGRA
SV + ISENSE 1
+ -
6V
480mV
SV +
2
BIAS 13 TGATEDR 3k
5V 2.9V 11 TSOURCE 3k INBOTTOM 4 5V 10 PV +
BOTTOM UV LOCK UVOUT 5
SGND
6 7 8
1336 FD
PGND BGATEFB
-
+
INTOP
3
-
+
W
16 SWITCH 15 SWGND 14 BOOST TRIP = 10.6V TRIP = 8.7V TOP UV DETECT 12 TGATEFB 9 BGATEDR 2.5V
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LT1336
TEST CIRCUIT
200H* 1N4148
+
LT1336 2
V
1
+
ISENSE
+
SWITCH SWGND BOOST TGATEDR TGATEFB TSOURCE
16 15 14
V/I
2 SV 3 4 5 6
+
V/I
1F 3k
INTOP INBOTTOM UVOUT SGND PGND BGATEFB
+
13 12
V/I
+
V
3000pF
1F
11
50 50
7 8
PV + 10 BGATEDR 9
+
V
+
V
* SUMIDA RCR-664D-221KC
3000pF
1336 TC01
TI I G DIAGRA
2V INTOP 0.8V
2V INBOTTOM 0.8V tr 12V TOP GATE DRIVER 0V tr 12V BOTTOM GATE DRIVER 0V t D1 10V 2V tf t D4
1336 TD
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W
t D3 10V 2V t D1 t D3 t D2 tf t D4 t D2
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LT1336 OPERATIO
The LT1336 incorporates two independent driver channels with separate inputs and outputs. The inputs are TTL/CMOS compatible; they can withstand input voltages as high as V +. The 1.4V input threshold is regulated and has 300mV of hysteresis. Both channels are noninverting drivers. The internal logic prevents both outputs from simultaneously turning on under any input conditions. When both inputs are high both outputs are actively held low. An internal switching regulator permits smooth transition from PWM to DC operation. In PWM operation the bootstrap capacitor is recharged each time Top Source pin goes low. As the duty cycle approaches 100% the output pulse width becomes narrower and the time available to produce an elevated upper MOSFET gate supply becomes shorter than required. As the voltage across the bootstrap capacitor drops below 10.6V, an inductor-based switching regulator kicks in and takes over the charging of the
APPLICATIONS INFORMATION
Deriving the Floating Supply In a typical half-bridge driver like the LT1158 or the LT1160, the floating supply for the topside driver is provided by a bootstrap capacitor. This capacitor is recharged each time its negative plate goes low in PWM operation. As the duty cycle approaches 100% the output pulse width becomes narrower and the time available to recharge the bootstrap capacitor becomes shorter than required (1s to 2s). For instance, at 100kHz and at 95% duty cycle the output pulse width is only 0.5s; clearly this is insufficient time to recharge the capacitor by bootstrapping. To get around this problem, the LT1336 incorporates a switching regulator to help recharge the bootstrap capacitor under such extreme conditions. The LT1336 provides all the necessary circuitry to construct a boost or flyback switching regulator. This regulator can charge the bootstrap capacitor when it cannot recharge by bootstrapping. This happens when nearing 100% duty cycle in PWM applications. This is a worstcase condition because the bootstrap capacitor must still provide for the gate charging current of the high side MOSFETs. A diode connected between V + and the Boost pin is still needed to allow conventional bootstrapping of the bootstrap capacitor when duty cycles are below 90%. The LT1336's internal switching regulator can provide enough charge to the bootstrap capacitor to allow the top driver to drive several power MOSFETs in parallel at its maximum operating frequency. The regulated voltage across VBOOST - VTSOURCE is 10.6V; when this voltage is exceeded due to normal bootstrap action, the regulator automatically shuts down. The switching regulator uses a hysteretic current mode control. This method of control is simple, inherently stable and provides peak inductor current limit in every cycle. It is designed to run at a nominal frequency of around 700kHz which is 7x the maximum PWM operating frequency of the LT1336. Since the hysteretic current mode control has no internal oscillator, the frequency is determined by external conditions such as supply voltage and load currents and external components such as inductor value and current sense resistor value.
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(Refer to Functional Diagram)
floating supply. This allows the output to smoothly transition to 100% duty cycle. An undervoltage detection circuit disables both channels when V + is below the undervoltage trip point. A separate undervoltage detect block disables the high side channel when VBOOST - VTSOURCE is below 9V. The top and bottom gate drivers in the LT1336 each utilize two gate connections: 1) a Gate Drive pin, which provides the turn-on and turn-off currents through an optional series gate resistor, and 2) a Gate Feedback pin which connects directly to the gate to monitor the gate-to-source voltage. Whenever there is an input transition to command the outputs to change states, the LT1336 follows a logical sequence to turn off one MOSFET and turn on the other. First, turn-off is initiated, then VGS is monitored until it has decreased below the turn-off threshold, and finally the other gate is turned on.
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LT1336
APPLICATIONS INFORMATION
In applications where switching is always above 10kHz and the duty cycle never exceeds 90%, Pins 1, 15 and 16 can be left open. The bootstrap capacitor is then charged by conventional bootstrapping. Only a diode needs to be connected between V + and the Boost pin. A 0.1F bootstrap capacitor is usually adequate using this technique for driving a single MOSFET under 10,000pF. When driving multiple MOSFETs in parallel, if the total gate capacitance exceeds 10,000pF, the bootstrap capacitor should be increased proportionally above 0.1F (see Paralleling MOSFETs). Deriving the Floating Supply with the Boost Topology The advantage of using the boost topology is its simplicity. Only a resistor, a small inductor, a diode and a capacitor are needed. However, the high voltage rail may not exceed 40V to avoid reaching the collector-base breakdown voltage of the internal NPN switch. The recommended values for the current sense resistor, inductor and bootstrap capacitor are 2, 200H and 1F respectively. Using the recommended component values the boost regulator will run at around 700kHz. To lower the frequency the inductor value can be increased and to increase the frequency the inductor value can be decreased. The sense resistor should be at least 1.5 to maintain adequate inductor current limit. The bootstrap capacitor value should be 1F or larger to minimize ripple voltage. An example of a boost regulator is shown in Figure 1.
D1 1N4148 200H* RSENSE 2 1/4W
ISENSE SV + PV +
SWITCH S SWGND BOOST D2 1N4148 HV = 40V MAX
LT1336 TSOURCE TGATEDR TGATEFB * SUMIDA RCR-664D-221KC
+
VBOOST
+
-
CBOOST 1F
Figure 1. Using the Boost Regulator
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The boost regulator works as follows: when switch S is on, the inductor current ramps up as the magnetic field builds up. During this interval energy is being stored in the inductor and no power is transferred to VBOOST. When the inductor peak current is reached, sensed by the 2 resistor, the switch is turned off. Energy is no longer transferred to the inductor causing the magnetic field to collapse. The collapsing magnetic field induces a change in voltage across the inductor. The Switch pin voltage rises until diode D2 starts conducting. As the inductor current ramps down, the lower inductor current threshold is reached and switch S is turned off, thus completing the cycle. Current drawn from V + is delivered to VBOOST. Some of this current (~ 1.5mA) flows through the topside driver to the Top Source pin. This current is typically returned to ground via the bottom MOSFET or the output load. If the bottom MOSFET were off and the output load were returned to HV, then the Top Source pin will return the current to HV through the top MOSFET or the output load. If the HV supply cannot sink current and no load drawing greater than 1.5mA is connected to the supply, then a resistor from HV to ground may be needed to prevent voltage buildup on the HV supply. Note that the current drawn from V + and delivered to VBOOST is significantly higher than the current drawn from VBOOST as given by:
V IIN V + = IOUT BOOST + V
Deriving the Floating Supply with the Flyback Topology For applications where the high voltage rail is greater than 40V, the flyback topology must be used. To configure a flyback regulator, a resistor, a diode, a small 1:1 turns ratio transformer and a capacitor are needed. The maximum voltage across the switch, assuming an ideal transformer, will be about V + + 11.3V. Leakage inductance in nonideal transformers will induce an overvoltage spike at the switch at the instant when it opens. These spikes can be clamped using a snubbing network or a Zener. Unlike the boost topology, the current drawn from V + (assuming no loss) is equal to the current drawn from VBOOST.
+
1336 F01
LT1336
APPLICATIONS INFORMATION
Using the components as shown in Figure 2 the flyback regulator will run at around 800kHz. To lower the frequency CFILTER can be increased and to increase the frequency CFILTER can be decreased.
D1 1N4148 T1* 24V 1000pF 6.2k
CFILTER 0.1F
1:1 1N4148 RSENSE 2 1/4W ISENSE SV + PV +
D2 1N4148 40V
SWITCH S SWGND BOOST LT1336 TSOURCE TGATEDR TGATEFB
+
VBOOST
+
-
CBOOST HV = 1F 60V MAX
* COILTRONICS CTX100-1P
Figure 2. Using the Flyback Regulator
The flyback regulator works as follows: when switch S is on, the primary current ramps up as the magnetic field builds up. The magnetic field in the core induces a voltage on the secondary winding equal to V +. However, no power is transferred to VBOOST because the rectifier diode D2 is reverse biased. The energy is stored in the transformer's magnetic field. When the primary inductor peak current is reached, the switch is turned off. Energy is no longer transferred to the transformer causing the magnetic field to collapse. The collapsing magnetic field induces a change in voltage across the transformer's windings. During this transition the Switch pin's voltage flies to 10.6V plus a diode above V +, the secondary forward biases the rectifier diode D2 and the transformer's energy is transferred to VBOOST. Meanwhile the primary inductor current goes to zero and the voltage at ISENSE decays to the lower inductor current threshold with a time constant of (RSENSE)(CFILTER), thus completing the cycle.
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Power MOSFET Selection Since the LT1336 inherently protects the top and bottom MOSFETs from simultaneous conduction, there are no size or matching constraints. Therefore, selection can be made based on the operating voltage and RDS(ON) requirements. The MOSFET BVDSS should be at least equal to the LT1336 absolute maximum operating voltage. For a maximum operating HV supply of 60V, the MOSFET BVDSS should be from 60V to 100V. The MOSFET RDS(ON) is specified at TJ = 25C and is generally chosen based on the operating efficiency required as long as the maximum MOSFET junction temperature is not exceeded. The dissipation in each MOSFET is given by: P = D IDS
( ) (1+ )R
2
DS ON
()
+
where D is the duty cycle and is the increase in RDS(ON) at the anticipated MOSFET junction temperature. From this equation the required RDS(ON) can be derived:
RDS(ON) = P D IDS 1 +
1336 F02
( )( )
2
For example, if the MOSFET loss is to be limited to 2W when operating at 5A and a 90% duty cycle, the required RDS(ON) would be 0.089/(1 + ). (1 + ) is given for each MOSFET in the form of a normalized RDS(ON) vs temperature curve, but = 0.007/C can be used as an approximation for low voltage MOSFETs. Thus, if TA = 85C and the available heat sinking has a thermal resistance of 20C/W, the MOSFET junction temperature will be 125C and = 0.007(125 - 25) = 0.7. This means that the required RDS(ON) of the MOSFET will be 0.089/1.7 = 0.0523, which can be satisfied by an IRFZ34 manufactured by International Rectifier. Transition losses result from the power dissipated in each MOSFET during the time it is transitioning from off to on, or from on to off. These losses are proportional to (f)(HV)2 and vary from insignificant to being a limiting factor on operating frequency in some high voltage applications.
11
LT1336
APPLICATIONS INFORMATION
Paralleling MOSFETs When the above calculations result in a lower RDS(ON) than is economically feasible with a single MOSFET, two or more MOSFETs can be paralleled. The MOSFETs will inherently share the currents according to their RDS(ON) ratio as long as they are thermally connected (e.g., on a common heat sink). The LT1336 top and bottom drivers can each drive five power MOSFETs in parallel with only a small loss in switching speeds (see Typical Performance Characteristics). A low value resistor (10 to 47) in series with each individual MOSFET gate may be required to "decouple" each MOSFET from its neighbors to prevent high frequency oscillations (consult manufacturer's recommendations). If gate decoupling resistors are used, the corresponding Gate Feedback pin can be connected to any one of the gates as shown in Figure 3. Driving multiple MOSFETs in parallel may restrict the operating frequency to prevent overdissipation in the LT1336 (see the following Gate Charge and Driver Dissipation).
GATEDR LT1336 GATEFB R G* HV
RG*
*OPTIONAL 10
1336 F03
Figure 3. Paralleling MOSFETs
Gate Charge and Driver Dissipation A useful indicator of the load presented to the driver by a power MOSFET is the total gate charge QG, which includes the additional charge required by the gate-to-drain swing. QG is usually specified for VGS = 10V and VDS = 0.8VDS(MAX). When the supply current is measured in a switching application, it will be larger than given by the DC electrical characteristics because of the additional supply current associated with sourcing the MOSFET gate charge:
dQ dQ ISUPPLY = IDC + G + G dt TOP dt BOTTOM
12
U
+
W
U
U
The actual increase in supply current is slightly higher due to LT1336 switching losses and the fact that the gates are being charged to more than 10V. Supply Current vs Switching Frequency is given in the Typical Performance Characteristics. The LT1336 junction temperature can be estimated by using the equations given in Note 1 of the Electrical Characteristics. For example, the LT1336IS is limited to less than 31mA from a 12V supply: TJ = 85C + (31mA)(12V)(110C/W) = 126C exceeds absolute maximum In order to prevent the maximum junction temperature from being exceeded, the LT1336 supply current must be verified while driving the full complement of the chosen MOSFET type at the maximum switching frequency. Ugly Transient Issues In PWM applications the drain current of the top MOSFET is a square wave at the input frequency and duty cycle. To prevent large voltage transients at the top drain, a low ESR electrolytic capacitor must be used and returned to the power ground. The capacitor is generally in the range of 25F to 5000F and must be physically sized for the RMS current flowing in the drain to prevent heating and premature failure. In addition, the LT1336 requires a separate 10F capacitor connected closely between Pins 2 and 6. The LT1336 top source is internally protected against transients below ground and above supply. However, the Gate Drive pins cannot be forced below ground. In most applications, negative transients coupled from the source to the gate of the top MOSFET do not cause any problems. Switching Regulator Applications The LT1336 is ideal as a synchronous switch driver to improve the efficiency of step-down (buck) switching regulators. Most step-down regulators use a high current Schottky diode to conduct the inductor current when the switch is off. The fractions of the oscillator period that the switch is on (switch conducting) and off (diode conducting) are given by:
LT1336
APPLICATIONS INFORMATION
V Switch On = OUT Total Period HV HV - VOUT Switch Off = Total Period HV
(
)
(
)
Note that for HV > 2VOUT, the switch is off longer than it is on, making the diode losses more significant than the switch. The worst case for the diode is during a short circuit, when VOUT approaches zero and the diode conducts the short-circuit current almost continuously. Figure 4 shows the LT1336 used to synchronously drive a pair of power MOSFETs in a step-down regulator application, where the top MOSFET is the switch and the bottom MOSFET replaces the Schottky diode. Since both conduction paths have low losses, this approach can result in very high efficiency (90% to 95%) in most applications. For regulators under 10A, using low RDS(ON) N-channel MOSFETs eliminates the need for heat sinks. RGS holds the top MOSFET off when HV is applied before the 12V supply. One fundamental difference in the operation of a stepdown regulator with synchronous switching is that it never becomes discontinuous at light loads. The inductor current doesn't stop ramping down when it reaches zero, but actually reverses polarity, resulting in a constant ripple current independent of load. This does not cause a significant efficiency loss (as might be expected) since the
LT1336 OUT A REF PWM OUT A INBOTTOM INTOP TSOURCE BGATEDR BGATEFB
Figure 4. Adding Synchronous Switching to a Step-Down Switching Regulator
U
W
U
U
negative inductor current is returned to HV when the switch turns back on. However, I2R losses will occur under these conditions due to the recirculating currents. The LT1336 performs the synchronous MOSFET drive in a step-down switching regulator. A reference and PWM are required to complete the regulator. Any voltage mode or current mode PWM controller may be used but the LT3526 is particularly well-suited to high power, high efficiency applications such as the 10A circuit shown in Figure 6. In higher current regulators a small Schottky diode across the bottom MOSFET helps to reduce reverserecovery switching losses. Motor Drive Applications In applications where rotation is always in the same direction, a single LT1336 controlling a half-bridge can be used to drive a DC motor. One end of the motor may be connected either to supply or to ground. A motor in this configuration is controlled by its inputs which give three alternatives: run, free running stop (coasting) and fast stop ("plugging" braking with the motor shorted by one of the MOSFETs). Whenever possible, returning one end of the motor to ground is preferable. When the motor is returned to supply and the boost topology is used to charge the bootstrap capacitor, the return current from the top driver will find its way to the high voltage rail through the top MOSFET. Since
HV
+
TGATEDR TGATEFB RGS RSENSE VOUT
+
1336 F04
13
LT1336
APPLICATIONS INFORMATION
most power supplies cannot sink current, this current can raise the voltage of the high voltage rail. This can be avoided by placing a discharge resistor between HV supply and ground to divert the return current to ground as shown in Figure 5. For a high voltage rail of 40V, a 26k resistor or smaller should be used, since the top driver will return about 1.5mA. For applications where using a discharge resistor is undesirable, use the flyback regulator topology instead of the boost regulator topology (see Deriving the Floating Supply with the Flyback Topology). To drive a DC motor in both directions, two LT1336s can be used to drive an H-bridge output stage. In this configuration the motor can be made to run clockwise, counterclockwise, stop rapidly ("plugging" braking) or free run (coast) to a stop. A very rapid stop may be achieved by reversing the current, though this requires more careful design to stop the motor dead. In practice a closed-loop control system with tachometric feedback is usually necessary.
+
10F LT1336 TSOURCE BGATEDR BGATEFB PGND *SUMIDA RCR-664D-221KC
1336 F05
TYPICAL APPLICATIONS
C1 0.1F 0.1F 4.7k
+
1F 1 18 17 16 15 LT3526 14 13 12 11 10 2.2nF f = 25kHz 1N4148 1N4148
+
10F RSENSE 2, 1/4W
4.7k
360 2 2k 0.33F 3 4
0.022F 1F
+
0.1F
5 6 7 8 9 27k
5k
510
1k
2N2222
SHUTDOWN
* SUMIDA RCR-664D-221KC ** MAGNETICS CORE #55585-A2 30 TURNS 14GA MAGNET WIRE DALE TYPE LVR-3 ULTRONIX RCS01
Figure 6. 90% Efficiency, 40V to 5V, 10A, Low Dropout Voltage Mode Switching Regulator
14
U
1k
W
U
U
U
The motor speed in these examples can be controlled by switching the drivers with pulse width modulated square waves. This approach is particularly suitable for microcomputers/DSP control loops.
D1 1N4148 200H* RSENSE 2 ISENSE 1/4W V+ V+
HV = 40V MAX
+
SWITCH BOOST TGATEDR TGATEFB D2 1N4148
RDISCHRG 24k
+
VBOOST
+ -
CBOOST 1F
Figure 5. Driving a Supply Referenced Motor
12V L1* 200H 40V LT1336 1 2 3 4 5 6 7 8 ISENSE SV + INTOP INBOTTOM UVOUT SGND PGND BGATEFB SWITCH SWGND BOOST TGATEDR TGATEFB TSOURCE PV 16 15 14 13 12 11 IRFZ44 1N4148 1N4148
+
+
2200F EA LOW ESR
+
1F 330k L2** 70H RS 0.007 5V
+ 10
+
IRFZ44 IRFZ44 MBR340
BGATEDR
9
5400F LOW ESR
1336 F06
LT1336
TYPICAL APPLICATIONS
100F IN
+
1k
10k 0.0033F
5V 0.1F 1k 1 2 3 1k 100k 4 LT1015 8 7 6 5 1 2 3 4 TC4428 8 7 6 5 2 3 4 5 6 1k 1 2 8 7 LT1016 6 5 10k 1k 10F 7 8 0.1F 1 ISENSE SV + INTOP INBOTTOM UVOUT SGND PGND BGATEFB LT1336
+
1F
0.1F
3 4
0.0033F 1 14 13 12 LT1058 11 10 9 8 200k
+
47F
2 3
10k
+
47F
10k
95k
4 5 6
200k 7
Kool M is a registered trademark of Magnetics, Inc.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
150k 12V
+
10F 1N4148
60V MAX
1000F SWITCH SWGND BOOST 16 15 14 13 12 11 10 9 L* 158H IRFZ44 0.1F 330k IRFZ44
+
TGATEDR TGATEFB TSOURCE PV + BGATEDR
+
10F
1N4148 LT1336 1 2 ISENSE SV + INTOP INBOTTOM UVOUT SGND PGND BGATEFB SWITCH SWGND BOOST TGATEDR TGATEFB TSOURCE PV + BGATEDR 16 15 14 13 12 11 10 9
1000F
+
+
10k 3 10k 4 150k 5 6 0.1F 7 8
LOAD
IRFZ44 0.1F 330k L* 158H
-12V
+
IRFZ44
10F
+
10k 47F
+
47F
10k
95k
* Kool M(R) CORE #77548-A7 35 TURNS 14GA MAGNET WIRE fCARRIER = 100kHz
1336 F07
Figure 7. 200W Class D, 10Hz to 1kHz Amplifier
15
LT1336
TYPICAL APPLICATIONS
12V
1
+
2.2F
2k
10k
2 3
+
1F 18k 0.1F
4 5 6 6800pF 25k 7 8 LT1846
* HURRICANE LAB HL-KM147U ** DALE TYPE LVR-3 ULTRONIX RCS01
100pF 18k
500k
4700pF f = 40kHz
Figure 8. 90% Efficiency, 40V to 5V, 10A, Low Dropout Current Mode Switching Regulator
PACKAGE DESCRIPTION
0.300 - 0.325 (7.620 - 8.255) 0.130 0.005 (3.302 0.127) 0.015 (0.381) MIN
0.009 - 0.015 (0.229 - 0.381)
(
+0.025 0.325 -0.015 8.255 +0.635 -0.381
)
0.125 (3.175) MIN
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254)
0.053 - 0.069 (1.346 - 1.752) 0 - 8 TYP
0.016 - 0.050 0.406 - 1.270
0.014 - 0.019 (0.355 - 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER LT1158 LT1160 LT1162 DESCRIPTION Half-Bridge N-Channel Power MOSFET Driver Half-Bridge N-Channel Power MOSFET Driver Full-Bridge N-Channel Power MOSFET Driver COMMENTS Single Input, Continuous Current Protection and Internal Charge Pump for DC Operation One Input per Channel, 60V High Voltage Supply Rail and Undervoltage Protection One Input per Channel, 60V High Voltage Supply Rail and Undervoltage Protection
LT/GP 0796 7K * PRINTED IN USA
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
U
U
+
10F 16 15 14 13 12 11 10 9 10k 1k 1N4148 5k Q1 1N4148 1k 1 2 3 4 5 6 7 8 ISENSE SV + INTOP INBOTTOM UVOUT SGND PGND BGATEFB
1N4148 LT1336 SWITCH SWGND BOOST TGATEDR TGATEFB TSOURCE PV + BGATEDR 16
2200F EA LOW ESR 40V
+
15 14 13 12 11 10 IRFZ44 9 0.1F
+
IRFZ34 330k L* 47H RS** 0.007 5V
+
IRFZ44 MBR340
5400F LOW ESR
1136 F08
Dimensions in inches (millimeters) unless otherwise noted. N Package 16-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.045 - 0.065 (1.143 - 1.651) 16 15 14 0.770* (19.558) MAX 13 12 11 10 9
0.065 (1.651) TYP 0.005 (0.127) MIN 0.100 0.010 (2.540 0.254) 0.018 0.003 (0.457 0.076)
0.255 0.015* (6.477 0.381)
1
2
3
4
5
6
7
8
N16 0695
S Package 16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.004 - 0.010 (0.101 - 0.254) 16 15 14
0.386 - 0.394* (9.804 - 10.008) 13 12 11 10 9
0.150 - 0.157** (3.810 - 3.988) 0.050 (1.270) TYP 0.228 - 0.244 (5.791 - 6.197)
1
2
3
4
5
6
7
8
S16 0695
(c) LINEAR TECHNOLOGY CORPORATION 1996

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